Interrupts and events
10.2.1
EXTI main features
The main features of the EXTI controller are the following:
•
independent trigger and mask on each interrupt/event line
•
dedicated status bit for each interrupt line
•
generation of up to 23 software event/interrupt requests
•
detection of external signals with a pulse width lower than the APB2 clock period. Refer
to the electrical characteristics section of the STM32F4xx datasheets for details on this
parameter.
10.2.2
EXTI block diagram
Figure 29
10.2.3
Wakeup event management
The STM32F4xx are able to handle external or internal events in order to wake up the core
(WFE). The wakeup event can be generated either by:
•
enabling an interrupt in the peripheral control register but not in the NVIC, and enabling
the SEVONPEND bit in the Cortex
MCU resumes from WFE, the peripheral interrupt pending bit and the peripheral NVIC
254/1324
shows the block diagram.
Figure 29. External interrupt/event controller block diagram
®
-M4 with FPU System Control register. When the
RM0430 Rev 8
RM0430
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