Exti Block Diagram; Wakeup Event Management; Functional Description; Figure 19. External Interrupt/Event Controller Block Diagram - ST STM32F205 series Reference Manual

RM0033
8.2.2

EXTI block diagram

Figure 19
PCLK2
To NVIC interrupt
controller
23
8.2.3

Wakeup event management

The STM32F20x and STM32F21x are able to handle external or internal events in order to
wake up the core (WFE). The wakeup event can be generated either by:
•
enabling an interrupt in the peripheral control register but not in the NVIC, and enabling
the SEVONPEND bit in the Cortex
resumes from WFE, the peripheral interrupt pending bit and the peripheral NVIC IRQ
channel pending bit (in the NVIC interrupt clear pending register) have to be cleared.
• or configuring an external or internal EXTI line in event mode. When the CPU resumes
from WFE, it is not necessary to clear the peripheral interrupt pending bit or the NVIC
IRQ channel pending bit as the pending bit corresponding to the event line is not set.
To use an external line as a wakeup event, refer to
8.2.4

Functional description

To generate the interrupt, the interrupt line should be configured and enabled. This is done
by programming the two trigger registers with the desired edge detection and by enabling
the interrupt request by writing a '1' to the corresponding bit in the interrupt mask register.
When the selected edge occurs on the external interrupt line, an interrupt request is
shows the block diagram.

Figure 19. External interrupt/event controller block diagram

23
Pending
request
register
Pulse
23 generator
23
AMBA APB bus
Peripheral interface
23
23
Software
Interrupt
interrupt
mask
event
register
Register
23
23
23
Event
mask
register
®
-M3 System Control register. When the MCU
Section 8.2.4: Functional
RM0033 Rev 8
Interrupts and events
23 23
Rising Falling
trigger trigger
selection selection
regsiter regsiter
23 23
Edge detect
circuit
description.
Input
line
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