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6.1.2 Block Diagram
Figure 6-1 shows a block diagram of the bus controller.
Internal
address bus
Area
decoder
WAIT
Legend
ASTCR:
Access state control register
WCER:
Wait state controller enable register
WCR:
Wait control register
6.1.3 Input/Output Pins
Table 6-1 summarizes the bus controller's input/output pins.
Table 6-1 Bus Controller Pins
Name
Abbreviation I/O
$6
Address strobe
5'
Read
:5
Write
:$,7
Wait
98
ASTCR
WCER
Bus control
circuit
Wait-state
controller
WCR
Figure 6-1 Block Diagram of Bus Controller
Function
Output Strobe signal indicating valid address output on the
address bus
Output Strobe signal indicating reading from the external
address space
Output Strobe signal indicating writing to the external address
space, with valid data on the data bus
(D
to D
7
Input
Wait request signal for access to external three-state-
access areas
Access state control signal
Wait request signal
)
0
Internal signals
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