Explanation Of Operation Of Address Match Detection Function - Fujitsu F2MC-16LX Hardware Manual

24.4 Explanation of Operation of Address Match Detection
Function
If the addresses of the instructions executed in the program match those set in the
detection address setting registers (PADR0, PADR1), the address match detection
function will replace the first instruction with the INT9 instruction (01
interrupt processing program.
Operation of Address Match Detection Function
Figure 24.4-1 shows the operation of the address match detection function when the detect addresses are set
and an address match is detected.
The instruction address to be
executed by program matches
detect address setting register 0
Setting Detect Address
1. Disable the detection address setting register 0 (PADR0) where the detect address is set for address
match detection (PACSR: AD0E = 0).
2. Set the detect address in the detection address setting register 0 (PADR0). Set "FF
the detection address setting register 0 (PADR0), "00
3. Enable the detect address setting register 0 (PADR0) where the detect address is set for address match
detection (PACSR: AD0E = 1).
Program Execution
1. If the address of the instruction to be executed in the program matches the set detect address, the first
instruction code at the matched address is replaced by the INT9 instruction code (01
2. INT9 instruction is executed. INT9 interrupt is generated and then interrupt processing program is
executed.
Table 25.5-2 shows the function list of the hardware sequence flag.
Figure 24.4-1 Operation of Address Match Detection Function
Program execution
CHAPTER 24 ADDRESS MATCH DETECTION FUNCTION
Address Instruction code
FF001C : A8 00 00
FF001F : 4A 00 00
FF0022 : 4A 80 08
Replaced by INT9 instruction (01
" at the middle bits, and "1F
H
) to branch to the
H
Mnemonic
MOVW RW0, #0000
MOVW A, #0000
MOVW A, #0880
)
H
" at the higher bits of
H
" at the lower bits.
H
).
H
555