8-Bit Pwm Timer Interrupts - Fujitsu F2MC-8L MB89620 Series Hardware Manual

4
7.

8-Bit PWM Timer Interrupts

The 8-bit PWM timer can generate an interrupt request when a match is detected
between the counter value and PWM compare register value for the interval timer
function. Interrupt requests are not generated for the PWM timer function.
n Interrupts for Interval Timer Function
The counter value is counted-up from "00
value matches the PWM compare register (COMR) value, the interrupt request flag bit (CNTR:
TIR) is set to "1".
At this time, an interrupt request (IRQ4) to the CPU is generated if the interrupt request enable
bit is enabled (CNTR: TIE = "1"). Write "0" to the TIR bit in the interrupt processing routine to
clear the interrupt request.
The TIR bit is set to "1" when the counter value matches the set value, regardless of the value
of the TIE bit.
Note: The TIR bit is not set if the counter is stopped (CNTR: TPE = "0") at the same time as the counter
value matches the COMR register value.
An interrupt request is generated immediately if the TIR bit is "1" when the TIE bit is changed from
disabled to enabled ("0" → "1").
n Register and Vector Table for 8-bit PWM Timer Interrupt
Table 7.4 Register and Vector Table for 8-bit PWM Timer Interrupt
Interrupt
IRQ4
Reference: See Section 3.4.2, "Interrupt Processing" for details on the interrupt operation.
MB89620 series
" on the selected count clock. When the counter
H
Interrupt level setting register
Register
ILR2 (007D ) L41 (Bit 1)
H
Setting bits
L40 (Bit 0)
CHAPTER 7 8-BIT PWM TIMER
Vector table address
Upper Lower
FFF2 FFF3
H H
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