Processing At Interrupt Operation; Fig. 6.7 Flow Of Handling Processing - Fujitsu MB90420/5 (A) Series Hardware Manual

6.4.2 Processing at Interrupt Operation

When an interrupt request is issued from the resource, the interrupt controller transmits the interrupt level to
the CPU. When the CPU is ready to accept the interrupt, the controller suspends the currently executing
instruction and executes the interrupt-processing routine or starts the EI
generated by the INT instruction, the interrupt-processing routine is executed irrespective of the state of the
CPU. At this time, the hardware interrupt is disabled.
n Processing at interrupt operation
Figure 6.7 shows the flow of handling at interrupt operation.
START
I & IF & IE = 1
AND
ILM > IL
String family*
instruction executing
NO
Fetch and decode next
instruction
INT Instruction?
NO
RETI Instruction?
NO
Execute normal instruction
(interrupt handling included)
NO
Repetitive execution
of string family* instruction
completed?
YES
Move pointer to next instruction
by updating PC
* : Interrupt determination performed by the step during execution of string family instruction
I : Interrupt enable flag of condition code register (CCR)
IF : Interrupt request flag of resource
IE : Interrupt enable flag of resource
ILM : Interrupt level mask register (in PS)
INTERRUPT
Main program
YES
Software interrupt or
exception handling
YES
Save dedicated registers to
system stack
I ← 0
(Disable hardware interrupt)
YES
Return processing
due to interrupt
Return to dedicated registers from
system stack, call interrupt
routine, and return to previous
routine

Fig. 6.7 Flow of Handling Processing

2
OS. When the software interrupt is
ISE = 1
NO
YES
Hardware
interrupt
Save dedicated registers to
system stack
ILM ← IL
(Transfer interrupt level of
accepted interrupt request to
ILM)
S ← 1
(Validate system stack)
PCB, PC ← interrupt vector
(Control branched to
interrupt-processing rouitne)
2
ISE : EI OS enable flag of interrupt control register (ICR)
IL : Interrupt level setting bit of interrupt control register (ICR)
S : Stack flag of condition code register (CCR)
PCB : Program bank register
PC : Program counter
6-17
Interrupt start/return processing
2
EI OS
YES
2
EI OS handling
Specified count reached?
Or termination request issued
from resource?
NO