Usbss Irq_Frame_Threshold_Tx1_0 Register (Irqframethold10); Usbss Irq_Frame_Threshold_Tx1_1 Register (Irqframethold11); Usbss Irq_Frame_Threshold_Tx1_0 Register (Irqframethold10) Field Descriptions; Usbss Irq_Frame_Threshold_Tx1_1 Register (Irqframetholdtx11) Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

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20.9.1.34 USBSS IRQ_FRAME_THRESHOLD_TX1_0 Register (IRQFRAMETHOLD10)

The USBSS IRQ_FRAME_THRESHOLD_TX1_0 register (IRQFRAMETHOLD10) defines the size of
the four FRAME thresholds for interrupt pacing for USB1. Each threshold contains is an 8-bit unsigned
number and can range from 0 to 255. A possible interrupt can be triggered if the count for that specific
endpoint has exceeded the value of the threshold. The counter for the compared value is also an 8-bit
unsigned number; therefore, setting the threshold to 255 prevents the possibility of a trigger.
The USBSS IRQ_FRAME_THRESHOLD_TX1_0 register is shown in
Table 20-65.
Figure 20-55. USBSS IRQ_FRAME_THRESHOLD_TX1_0 Register (IRQFRAMETHOLD10)
31
frame_thres_tx1_3
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 20-65. USBSS IRQ_FRAME_THRESHOLD_TX1_0 Register (IRQFRAMETHOLD10) Field
Bits Field
31-24 frame_thres_tx1_3
23-16 frame_thres_tx1_2
15-8 frame_thres_tx1_1
7-0 Reserved
20.9.1.35 USBSS IRQ_FRAME_THRESHOLD_TX1_1 Register (IRQFRAMETHOLDTX11)
The USBSS IRQ_FRAME_THRESHOLD_TX1_1 register (IRQFRAMETHOLDTX11) defines the size of
the four FRAME thresholds for interrupt pacing for USB1. Each threshold contains is an 8-bit unsigned
number and can range from 0 to 255. A possible interrupt can be triggered if the count for that specific
endpoint has exceeded the value of the threshold. The counter for the compared value is also an 8-bit
unsigned number; therefore, setting the threshold to 255 prevents the possibility of a trigger.
The USBSS IRQ_FRAME_THRESHOLD_TX1_1 register is shown in
Table 20-66.
Figure 20-56. USBSS IRQ_FRAME_THRESHOLD_TX1_1 Register (IRQFRAMETHOLD11)
31
frame_thres_tx1_7
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 20-66. USBSS IRQ_FRAME_THRESHOLD_TX1_1 Register (IRQFRAMETHOLDTX11) Field
Bits Field
31-24 frame_thres_tx1_7
23-16 frame_thres_tx1_6
15-8 frame_thres_tx1_5
7-0 frame_thres_tx1_4
SPRUGX9 – 15 April 2011
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24 23
frame_thres_tx1_2
R/W-0
Description
FRAME threshold value for tx_pkt_cmp_0 for USB1 endpoint 3.
FRAME threshold value for tx_pkt_cmp_0 for USB1 endpoint 2.
FRAME threshold value for tx_pkt_cmp_0 for USB1 endpoint 1.
Always read as 0. Writes have no effect.
24 23
frame_thres_tx1_6
R/W-0
Description
FRAME threshold value for tx_pkt_cmp_0 for USB1 endpoint 7.
FRAME threshold value for tx_pkt_cmp_0 for USB1 endpoint 6.
FRAME threshold value for tx_pkt_cmp_0 for USB1 endpoint 5.
FRAME threshold value for tx_pkt_cmp_0 for USB1 endpoint 4.
© 2011, Texas Instruments Incorporated
Preliminary
16 15
frame_thres_tx1_1
R/W-0
Descriptions
16 15
frame_thres_tx1_5
R/W-0
Descriptions
Figure 20-55 and described in
8 7
Reserved
R/0
Figure 20-56 and described in
8 7
frame_thres_tx1_4
R/W-0
Universal Serial Bus (USB)
Registers
0
0
1851