Reset Operation; Figure 3.5-2 Reset Operation Flowchart - Fujitsu F2MC-8L Series Hardware Manual

CHAPTER 3 CPU
3.5.2

Reset Operation

When the CPU wakes up from a reset, the CPU selects the read address of the mode
data and reset vector according to the mode pin settings, then performs a mode fetch.
The mode fetch is performed after the oscillation stabilization delay time has passed
when power is turned on to a product with power-on reset option, or on wake-up from
subclock or stop mode by a reset. If a reset occurs during a write to RAM, the contents
of the RAM address cannot be assured.
Overview of Reset Operation
During reset
operation
Mode fetch
(reset operation)
Normal operation
(RUN state)
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Figure 3.5-2 Reset Operation Flowchart

Software reset
Watchdog reset
NO
NO
Operating in
subclock mode?
Main clock oscillation
stabilization delay reset
state
Fetch the instruction code from the address
indicated by the reset vector and execute
instruction.
External reset input Power-on reset
Power-on reset
option selected?
YES
Power-on or subclock or
stop mode?
YES
Main clock oscillation Main clock oscillation
stabilization delay reset stabilization delay reset
state state
NO
Wakes up from external
reset?
YES
Fetch mode data
Fetch reset vector
(optional)