Debug support (DBG)
Table 271. DWT register map and reset values (continued)
Offset Register name
DWT_COMP2R
0x040
Reset value
DWT_MASK2R
0x044
Reset value
DWT_FUNCT2R
0x048
Reset value
0x04C
Reserved
DWT_COMP3R
0x050
Reset value
DWT_MASK3R
0x054
Reset value
DWT_FUNCT3R
0x058
Reset value
0x05C to
Reserved
0xFCC
DWT_PIDR4
0xFD0
Reset value
0xFD4 to
Reserved
0xFDC
DWT_PIDR0
0xFE0
Reset value
DWT_PIDR1
0xFE4
Reset value
DWT_PIDR2
0xFE8
Reset value
DWT_PIDR3
0xFEC
Reset value
DWT_CIDR0
0xFF0
Reset value
DWT_CIDR1
0xFF4
Reset value
DWT_CIDR2
0xFF8
Reset value
1350/1450
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
COMP[31:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reserved.
COMP[31:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reserved.
Reserved.
RM0453 Rev 5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
F4KCOUNT
[3:0]
0
0
0
PARTNUM[7:0]
0
0
0
JEP106ID
[3:0]
1
0
1
REVISION
[3:0]
0
0
1
REVAND[3:0] CMOD[3:0]
0
0
0
PREAMBLE[7:0]
0
0
0
CLASS[3:0]
1
1
1
PREAMBLE[19:12]
0
0
0
RM0453
0
0
0
0 0
MASK[4:0]
0
0
0
0 0
0
0
0 0
0
0
0
0 0
MASK[4:0]
0
0
0
0 0
0
0
0 0
JEP106CON
[3:0]
0
0
1
0 0
0
0
0
1 0
PARTNUM
[11:8]
1
0
0
0 0
JEP106ID
[6:4]
1
1
0
1 1
0
0
0
0 0
0
1
1
0 1
PREAMBLE
[11:8]
0
0
0
0 0
0
0
1
0 1
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