STMicroelectronics STM32WL5 Series Reference Manual page 1328

Debug support (DBG)
38.4.9 DP read buffer register (DP_BUFFR)
Address offset: 0x0C
Reset value: 0x0000 0000
31 30 29
r r r
15 14 13
r r r
Bits 31:0 RDBUFF[31:0]: Contains the value returned by the last AP read access.
The value returned by an AP read access can either be obtained using a second read access
to the same address, which initiates a new transaction on the corresponding bus, or else it
can be read from this register, in which case no new AP transaction occurs.
38.4.10 DP target identification register (DP_TARGETSELR)
Address offset: 0x0C
Reset value: 0xXXXX XXXX
31 30 29
TINSTANCE[3:0]
w w w
15 14 13
TPARTNO[3:0]
w w w
Bits 31:28 TINSTANCE[3:0]: target instance number
Defines the instance number for the target device in a multi-drop system. These bits must be
written with the same value used for DP_DLPIDR.TINSTANCE to select this device.
Bits 27:12 TPARTNO[15:0]: target part number
Defines the part number for the target device. These bits must be written with the same value
used for DP_TARGETIDR.TPARTNO to select this device.
Bits 11:1 TDESIGNER[10:0]: target designer JEDEC code
Defines the JEDEC code for the target device. These bits must be written with the same
value used for DP_TARGETIDR.TDESIGNER to select this device.
Bit 0 Reserved, must be kept at reset value.
1328/1450
28 27 26 25
r r r r
12 11 10 9
r r r r
28 27 26 25
w w w w
12 11 10 9
w w w w
24 23 22
RDBUFF[31:16]
r r r
8 7 6
RDBUFF[15:0]
r r r
24 23 22
TPARTNO[15:4]
w w w
8 7 6
TDESIGNER[10:0]
w w w
RM0453 Rev 5
21 20 19 18
r r r r
5 4 3 2
r r r r
21 20 19 18
w w w w
5 4 3 2
w w w w
RM0453
17 16
r r
1 0
r r
17 16
w w
1 0
Res.
w