Figure 387. Debugger Connection To Debug Components - STMicroelectronics STM32WL5 Series Reference Manual

RM0453
DPACC
Data[31:0]
APSEL
decode
Address
incrementer
Debug
access
decode
(1) This is only a partial view of the DP registers (refer to the DP registers descriptions for more details.
(2) Register field widths are not to scale. For example, RnW is a single bit.

Figure 387. Debugger connection to debug components

APACC
A[3:2] RnW Data[31:0]
Data [31:0]
(2)
Addr[31:2] Data[31:0]
A[3:2] RnW
A[7:4] A[3:2] RnW
RnW
RM0453 Rev 5
Debug support (DBG)
A[7:4] selects the register bank.
A[3:2] selects a register within bank.
Memory
access port
(MEM-AP)
MSv60375V1
1333/1450
1435