Power Down - Xilinx 7 Series User Manual

After Changing Channel Bonding Mode on the Fly
When set to TRUE, RXBUF_RESET_ON_CB_CHANGE enables automatic reset of the RX elastic
buffer when the RXCHANBONDMASTER, RXCHANBONDSLAVE, or
RXCHANBONDLEVEL change.
After a PRBS Error
PRBSCNTRESET is asserted to reset the PRBS error counter.
After Comma Realignment
When set to TRUE, RXBUF_RESET_ON_COMMAALIGN enables automatic reset of the RX
elastic buffer during comma realignment.

Power Down

Functional Description
The GTP transceiver supports a range of power-down modes. These modes support both generic
power management capabilities as well as those defined in the PCI Express® and SATA standards.
The GTP transceiver offers different levels of power control. Each channel in each direction can be
powered down separately using TXPD and RXPD. The PLL0PD port directly affects the PLL0
while the PLL1PD port affects PLL1.
Ports and Attributes
Table 2-23
Table 2-23: Power-Down Ports
PLL0PD
PLL1PD
RXPD[1:0]
7 Series FPGAs GTP Transceivers User Guide
UG482 (v1.9) December 19, 2016
defines the power-down ports.
Port Dir
In
In
In
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Clock Domain
Async This active-High signal powers
down PLL0.
Async This active-High signal powers
down PLL1.
Async Powers down the RX lane
according to the PCI Express
PIPE protocol encoding.
00: P0 (normal operation)
01: P0s (low recovery time
power down)
10: P1 (longer recovery time)
11: P2 (lowest power state)
Power Down
Description
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