Xilinx 7 Series User Manual page 253

Placement Information by Device
Table B-1
transceiver banks. defines the Zynq-7000 device-package combinations and the available GTP
transceiver banks. For transceiver location, refer to
Package.
Table B-1: Artix-7 FPGA Device-Package Combinations and GTP Transceiver Banks
Package CPG236
MGT_BANK MGT_BANK
XC7A12T
_216
MGT_BANK MGT_BANK
XC7A15T
_216
MGT_BANK MGT_BANK
XC7A25T
_216
MGT_BANK MGT_BANK
XC7A35T
_216
MGT_BANK MGT_BANK
XC7A50T
_216
XC7A75T
XC7A100T
XC7A200T
Table B-2: Zynq-7000 Device/Package Combinations and GTP Transceiver Banks
7 Series FPGAs GTP Transceivers User Guide
UG482 (v1.9) December 19, 2016
defines the Artix™-7 FPGA device-package combinations and the available GTP
CSG325 FGG484
_216
MGT_BANK
_216 _216
_216
MGT_BANK
_216 _216
MGT_BANK
_216 _216
MGT_BANK
MGT_BANK
_216
MGT_BANK
MGT_BANK
MGT_BANK
_216
MGT_BANK
Package
XC7Z012S
XC7Z015
www.xilinx.com
Appendix A, Placement Information by
FGG676 SBG484
_213,
_216
_213,
_216
MGT_BANK MGT_BANK
_216
Appendix B
FBG484 FBG676 FFG1156
MGT_BANK
MGT_BANK MGT_BANK
_213,
_216 MGT_BANK MGT_BANK
_216
MGT_BANK
CLG485
MGT_BANK_112
MGT_BANK_112
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_113,
_116,
_213,
_216
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