Xilinx 7 Series User Manual page 153

The diagnostic use modes could be used, for example, to examine the pattern of burst errors due to
equalization behavior.
Figure 4-23
X-Ref Target - Figure 4-23
ES_CONTROL[1:0] are the signals arm and run, respectively. From the WAIT state, run initiates
the BER measurement loop (left) and arm starts the diagnostic loop (right).
The RESET state zeros the error and sample counters, then enters the COUNT state or the ARMED
state (depending on whether run or arm is active).
In the COUNT state, samples and errors are accumulated in the counters. When either counter is
saturated, both counters stop and transition to the END state. This transition to the END state is
detected by polling es_control_status[3:0]. Bit 0 (done) is set active only in the END, READ, and
WAIT states. Bits [3:1] display the current state of the state machine.
The END state transitions to the WAIT state when run is set back to zero. The
es_sample_count[15:0] and es_error_count[15:0] can be read either in the END or WAIT state.
In the ARMED state, the FIFOs (successive cycles of Rdata and of Sdata) are stopped when a trigger
event occurs. The trigger event is either the count qualifier pulse, the logical OR of all bits into the
error counter, or a manual trigger provided from a DRP data input or from a port. One of these four
options is selected by trig[3:0] = ES_CONTROL[5:2].
In the READ state, the last two cycles of Rdata can be read from the COE status register,
es_rdata[79:0], and the last two cycles of Sdata can be read from the COE status register,
es_sdata[79:0].
7 Series FPGAs GTP Transceivers User Guide
UG482 (v1.9) December 19, 2016
documents the state transitions in the eye scan state machine.
run and
sample_count_zero and
error_count_zero
COUNT
(011)
sample_count_sat or
error_count_sat or
run = 0
END
(010)
run = 0
Figure 4-23: Eye Scan State Machine
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WAIT
(000)
run
or
arm
RESET
(001)
arm and
sample_count_zero and
error_count_zero
ARMED
(101)
trigger event or
(arm = 0 and
trig[2:0] = 000)
READ
(100)
arm = 0
UG482_c4_12_110911
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