Xilinx 7 Series User Manual page 250

Appendix A: Placement Information by Package
X-Ref Target - Figure A-13
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XC7A200T:
GTPE2_CHANNEL_X0Y3
XC7A200T:
GTPE2_CHANNEL_X0Y2
XC7A200T:
GTPE2_COMMON_X0Y0
XC7A200T:
GTPE2_CHANNEL_X0Y1
XC7A200T:
GTPE2_CHANNEL_X0Y0
Figure A-13: Placement Diagram for the FFG1156 Package (3 of 4)
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AN23 MGTPTXP3_213
AP23 MGTPTXN3_213
AJ21 MGTPRXP3_213
AK21 MGTPRXN3_213
AL22 MGTPTXP2_213
AM22 MGTPTXN2_213
AL20 MGTPRXP2_213
AM20 MGTPRXN2_213
AG18 MGTREFCLK1P_213
AH18 MGTREFCLK1N_213
AG20 MGTREFCLK0P_213
AH20 MGTREFCLK0N_213
AN21 MGTPTXP1_213
AP21 MGTPTXN1_213
AJ19 MGTPRXP1_213
AK19 MGTPRXN1_213
AN19 MGTPTXP0_213
AP19 MGTPTXN0_213
AL18 MGTPRXP0_213
AM18 MGTPRXN0_213
UG482_aA_09_021113
7 Series FPGAs GTP Transceivers User Guide
UG482 (v1.9) December 19, 2016