Xilinx 7 Series User Manual page 14

Chapter 1: Transceiver and Tool Overview
X-Ref Target - Figure 1-2
GTPE2_CHANNEL
RX TX
Four GTPE2 channels clustered together with one GTPE2_COMMON primitive are called a Quad
or Q.
The GTPE2_COMMON primitive contains two ring oscillator PLLs (PLL0 and PLL1).
GTPE2_COMMON must always be instantiated.
Each GTPE2_CHANNEL primitive consists of a transmitter and a receiver.
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GTPE2_CHANNEL
RX TX
PLL0
REFCLK Distribution
IBUFDS_GTE2
Figure 1-2: GTP Transceiver Quad Configuration
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GTPE2_CHANNEL
RX
PLL1
GTPE2_COMMON
IBUFDS_GTE2
7 Series FPGAs GTP Transceivers User Guide
GTPE2_CHANNEL
TX RX TX
UG482_c1_02_110811
UG482 (v1.9) December 19, 2016