Xilinx 7 Series User Manual page 249

X-Ref Target - Figure A-12
7 Series FPGAs GTP Transceivers User Guide
UG482 (v1.9) December 19, 2016
XC7A200T:
GTPE2_CHANNEL_X1Y7
XC7A200T:
GTPE2_CHANNEL_X1Y6
XC7A200T:
GTPE2_COMMON_X1Y1
XC7A200T:
GTPE2_CHANNEL_X1Y5
XC7A200T:
GTPE2_CHANNEL_X1Y4
Figure A-12: Placement Diagram for the FFG1156 Package (2 of 4)
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FFG1156 Package Placement Diagram
B17 MGTPTXP3_116
A17 MGTPTXN3_116
F17 MGTPRXP3_116
E17 MGTPRXN3_116
B15 MGTPTXP2_116
A15 MGTPTXN2_116
D16 MGTPRXP2_116
C16 MGTPRXN2_116
H14 MGTREFCLK1P_116
G14 MGTREFCLK1N_116
H16 MGTREFCLK0P_116
G16 MGTREFCLK0N_116
D14 MGTPTXP1_116
C14 MGTPTXN1_116
F15 MGTPRXP1_116
E15 MGTPRXN1_116
B13 MGTPTXP0_116
A13 MGTPTXN0_116
F13 MGTPRXP0_116
E13 MGTPRXN0_116
UG482_aA_08_021113
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