Xilinx Spartan-6 User Manual
  1. Manuals
  2. Brands
  3. Xilinx Manuals
  4. Transceiver
  5. Spartan-6
  6. User manual

Xilinx Spartan-6 User Manual

Fpga gtp transceiver signal integrity simulation kit
Hide thumbs Also See for Spartan-6:
Table of Contents

Advertisement

Quick Links

Download this manual
Spartan-6 FPGA
GTP Transceiver Signal
Integrity Simulation Kit
User Guide
For Mentor Graphics HyperLynx
UG396 (v1.0) June 10, 2010

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the Spartan-6 and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

Related Manuals for Xilinx Spartan-6

Summary of Contents for Xilinx Spartan-6

  • Page 1 Spartan-6 FPGA GTP Transceiver Signal Integrity Simulation Kit User Guide For Mentor Graphics HyperLynx UG396 (v1.0) June 10, 2010...

  • Page 2: Revision History

    Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reserves the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors contained in the Documentation, or to advise you of any corrections or updates.

  • Page 3: Table Of Contents

    Online Document ............6 Chapter 1: Spartan-6 FPGA GTP Transceiver Signal Integrity...
  • Page 4 Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...

  • Page 5: Preface: About This Guide

    (SIS) Kit for Mentor Graphics HyperLynx. Guide Contents This user guide contains this chapter and appendices: • Chapter 1, Spartan-6 FPGA GTP Transceiver Signal Integrity Simulation Kit, explains installation, configuration, and use of the HyperLynx software to simulate Spartan-6 FPGA GTP transceivers.

  • Page 6: Online Document

    Blue text in the current document Refer to Overview, page 7 details. Go to http://www.xilinx.com Blue, underlined text Hyperlink to a website (URL) for the latest documentation. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...

  • Page 7: Chapter 1: Spartan-6 Fpga Gtp Transceiver Signal Integrity Simulation Kit

    Graphics HyperLynx provides a simulation environment for evaluating channel designs for Spartan-6 FPGA GTP transceivers. This document explains how to install the SIS kit and associated files, gives an overview of the SIS kit file hierarchy, and describes the steps for getting started with simulations.

  • Page 8: File Hierarchy

    Chapter 1: Spartan-6 FPGA GTP Transceiver Signal Integrity Simulation Kit To prevent errors or warnings when the project files are moved to a different directory (or computer), replace the path listed on the last line in the PJH files (located in the HL_projects subdirectory) with a relative path: INIFILE=.\S6_kit.ini.

  • Page 9: Getting Started

    .TEMP and .option compat (the HSPICE compatibility switch for Eldo), into the project. These parameters are managed automatically by the configurator programs. Removing J0 results in incorrect simulations. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...

  • Page 10: Modifying The Driver Settings

    1-2. X-Ref Target - Figure 1-2 UG396_c1_02_042010 Figure 1-2: Assign Models For more information on the driver settings, refer to UG386, Spartan-6 FPGA GTP Transceivers User Guide. Notes relevant to this step: • The global simulation temperature setting can be changed in either driver or receiver configurators.
  • Page 11 Data rate setting in the TX configurator (see Figure 1-3). Each setting must be done explicitly. X-Ref Target - Figure 1-3 UG396_c1_03_042010 Figure 1-3: Configure Spartan-6 FPGA GTP Transmitter www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...

  • Page 12: Customizing The Channel Representation

    Chapter 1: Spartan-6 FPGA GTP Transceiver Signal Integrity Simulation Kit The setting for the Approx. Output Switching Time = 0.3 ns drop-down box shown Figure 1-4 is meant to be the SPICE driver output (not stimulus) rise or fall time and is used to set the step size and estimate crosstalk effects in the simulation.

  • Page 13: Modifying The Receiver Settings

    Repeat the steps in Modifying the Driver Settings. Adjust the receiver (U2) simulation parameters. For more information on the driver settings, refer to UG386, Spartan-6 FPGA GTP Transceivers User Guide. Notes relevant to this section: • The global simulation temperature setting can be changed in either driver or...

  • Page 14: Adjusting Simulation Settings

    Chapter 1: Spartan-6 FPGA GTP Transceiver Signal Integrity Simulation Kit Adjusting Simulation Settings Click Run Interactive Simulation (Oscilloscope) under the Simulate tab. Select the Eldo/ADMS radio button under the Start Simulation button, as shown in Figure 1-6. X-Ref Target - Figure 1-6...
  • Page 15 The frequency of the pulse train and the time of the bit interval specified in the oscilloscope must match the data rate setting in the TX configurator. Each setting has to be done explicitly. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...

  • Page 16: Running The Simulation

    Chapter 1: Spartan-6 FPGA GTP Transceiver Signal Integrity Simulation Kit • The radio buttons in the IC modeling group (Figure 1-6) are ineffective because the simulation corner selections are made using the Configure Model button in the Assign Models dialog box.

  • Page 17: Appendix A: Frequently Asked Questions

    Click No, close HyperLynx, edit the PJH file as described in Installation and Requirements, page 7, and start HyperLynx again, • Click Yes and browse to the hl_projects directory to locate the DesignName.pjh file. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 18 .TEMP and .option compat (the HSPICE compatibility switch for Eldo) into the project. These parameters are managed automatically by the configurator programs. Removing J0 results in incorrect simulations. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 19 X-Ref Target - Figure A-4 Path to the Kit Must Not Contain Spaces UG396_aA_04_061010 Figure A-4: Example of Path www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 20 The HyperLynx license is not set to perform Eldo simulations. Contact the license manager or a Mentor Graphics representative to resolve this issue. X-Ref Target - Figure A-5 UG396_aA_05_042010 Figure A-5: HSPICE Compatible Radio Button www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...

  • Page 21: Appendix B: Hspice And Hyperlynx/Eldo Correlation Results

    Fast Process Corner with Maximum Voltage and Cold Temperature 4'b1010 3'b000 2'b00 4'b1010 3'b011 2'b00 Slow Process Corner with Minimum Voltage and Hot Temperature 4'b1010 3'b000 2'b00 4'b1010 3'b011 2'b00 www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 22 No external capacitor • No ground termination The simulation results are provided in these sections: • GTP REFCLK Model Correlation, page 23 • GTP Transceiver Model Correlation, page 27 www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...

  • Page 23: Gtp Refclk Model Correlation

    GTP REFCLK Model Correlation GTP REFCLK Model Correlation Figure B-1 through Figure B-3 contain the waveform overlays of the correlation simulations for the GTP REFCLK testbench (GTP_RefClk.ffs). www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 24 Volts (Vppd) FOM=99.8637% -0.2 Time (ns) UG396_aB_01_051410 Figure B-1: GTP REFCLK - Typical Note: The blue waveforms cannot be seen because the red waveforms are covering them. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 25 HSPICE Eldo FOM=99.9618% -0.2 Time (ns) UG396_aB_02_051410 Figure B-2: GTP REFCLK - Fast Note: The blue waveforms cannot be seen because the red waveforms are covering them. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 26 Volts (Vppd) FOM=99.893% -0.2 Time (ns) UG396_aB_03_051410 Figure B-3: GTP REFCLK - Slow Note: The blue waveforms cannot be seen because the red waveforms are covering them. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...

  • Page 27: Gtp Transceiver Model Correlation

    Figure B-4: TXDIFFCTRL = 0000, TXPREEMP = 000, RXEQMIX = 00 (Typical - GTP Transceiver) Note: The blue waveforms cannot be seen because the red waveforms are covering them. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 28 Figure B-5: TXDIFFCTRL = 0100, TXPREEMP = 000, RXEQMIX = 00 (GTP Transceiver - Typical) Note: The blue waveforms cannot be seen because the red waveforms are covering them. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 29 Figure B-6: TXDIFFCTRL = 1010, TXPREEMP = 000, RXEQMIX = 00 (Typical - GTP Transceiver) Note: The blue waveforms cannot be seen because the red waveforms are covering them. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 30 Figure B-7: TXDIFFCTRL = 1010, TXPREEMP = 010, RXEQMIX = 00 (Typical - GTP Transceiver) Note: The blue waveforms cannot be seen because the red waveforms are covering them. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 31 Figure B-8: TXDIFFCTRL = 1010, TXPREEMP = 100, RXEQMIX = 00 (Typical - GTP Transceiver) Note: The blue waveforms cannot be seen because the red waveforms are covering them. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 32 Figure B-9: TXDIFFCTRL = 1010, TXPREEMP = 111, RXEQMIX = 00 (Typical - GTP Transceiver) Note: The blue waveforms cannot be seen because the red waveforms are covering them. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 33 Figure B-10: TXDIFFCTRL = 1010, TXPREEMP = 000, RXEQMIX = 01 (Typical - GTP Transceiver) Note: The blue waveforms cannot be seen because the red waveforms are covering them. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 34 Figure B-11: TXDIFFCTRL = 1010, TXPREEMP = 000, RXEQMIX = 10 (Typical - GTP Transceiver) Note: The blue waveforms cannot be seen because the red waveforms are covering them. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 35 Figure B-12: TXDIFFCTRL = 1010, TXPREEMP = 000, RXEQMIX = 11 (Typical - GTP Transceiver) Note: The blue waveforms cannot be seen because the red waveforms are covering them. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 36 Figure B-13: TXDIFFCTRL = 1010, TXPREEMP = 000, RXEQMIX = 00 (Fast - GTP Transceiver) Note: The blue waveforms cannot be seen because the red waveforms are covering them. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 37 Figure B-14: TXDIFFCTRL = 1010, TXPREEMP = 011, RXEQMIX = 00 (Fast - GTP Transceiver) Note: The blue waveforms cannot be seen because the red waveforms are covering them. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 38 Figure B-15: TXDIFFCTRL = 1010, TXPREEMP = 000, RXEQMIX = 00 (Slow - GTP Transceiver) Note: The blue waveforms cannot be seen because the red waveforms are covering them. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 39 Figure B-16: TXDIFFCTRL = 1010, TXPREEMP = 011, RXEQMIX = 00 (Slow - GTP Transceiver) Note: The blue waveforms cannot be seen because the red waveforms are covering them. www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...
  • Page 40 Appendix B: HSPICE and HyperLynx/Eldo Correlation Results www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) UG396 (v1.0) June 10, 2010...

Table of Contents

Save PDF