Tx Out-Of-Band Signaling - Xilinx 7 Series User Manual

Fpgas gtp transceivers
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X-Ref Target - Figure 3-23
Note:
scale.
Notes relevant to
1.
2.

TX Out-of-Band Signaling

Functional Description
Each GTP transceiver provides support for generating the out-of-band (OOB) sequences described
in the Serial ATA (SATA), Serial Attach SCSI (SAS) specification, and beaconing described in the
PCI Express specification.
Ports and Attributes
Table 3-32
Table 3-32: TX OOB Signaling Ports
TXCOMFINISH
TXCOMINIT
TXCOMSAS
TXCOMWAKE
7 Series FPGAs GTP Transceivers User Guide
UG482 (v1.9) December 19, 2016
CLK
[TX/RX]PD
TXDETECTRX
PHYSTATUS
RXSTATUS
Figure 3-23: PCI Express Receiver Detection
Figure 3-23
shows the sequence of events for the receiver present case and is not drawn to
Figure
3-23:
Ensure that the GTP transceiver has successfully entered the P1 power state with [TX/RX]PD
= 2'd2 before receiver detection is performed by asserting TXDETECTRX.
Wait for PHYSTATUS = 1'd1 to read RXSTATUS on the same PCLK cycle. In PCI Express
mode, PCLK is [TX/RX]USRCLK. If RXSTATUS = 3'd3, then the receiver is present. If
RXSTATUS = 3'd0, then the receiver is not present. Deassert TXDETECTRX to exit receiver
detection.
shows the OOB signaling related ports.
Port
Dir
Out
In
In
In
www.xilinx.com
3'd0
Clock Domain
TXUSRCLK2
Indicates completion of transmission of
the last SAS or SATA COM beacon.
TXUSRCLK2
Initiates transmission of the COMINIT
sequence for SATA/SAS.
TXUSRCLK2
Initiates transmission of the COMSAS
sequence for SAS.
TXUSRCLK2
Initiates transmission of the COMWAKE
sequence for SATA/SAS.
TX Out-of-Band Signaling
2'd2
3'd3
3'd0
UG482_c3_22_110911
Description
123
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