Xilinx 7 Series User Manual page 198

Chapter 4: Receiver
skew between each lane and adjust the latency of RX elastic buffers, so that data is presented
without skew at the RX fabric user interface.
X-Ref Target - Figure 4-47
RX channel bonding supports 8B/10B encoded data but does not support these encoded data types:
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RX Data in Two Clock Cycles
Ahead of GTP1 Data
SEQ SEQ SEQ SEQ
data data
4 3 2 1
Set to 4 Cycles of Latency by
Channel Bonding Controller
RX Data in Two Clock Cycles
Behind GTP0 Data
SEQ SEQ SEQ SEQ
data data
4 3 2 1
Set to 2 Cycles of Latency by
Channel Bonding Controller
Figure 4-47: Channel Bonding Conceptual View
64B/66B
64B/67B
128B/130B
Scrambled data
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Elastic Buffer
SEQ SEQ
data
4
Elastic Buffer
SEQ SEQ
data
4
7 Series FPGAs GTP Transceivers User Guide
UG482 (v1.9) December 19, 2016
GTP0 (Master)
Deskewed
SEQ SEQ
data
3 2 1
Data
GTP1 (Slave)
Deskewed
SEQ SEQ
data
3 2 1
Data
UG482_c4_29_111011