Xilinx 7 Series User Manual page 48

Fpgas gtp transceivers
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Chapter 2:
Shared Features
2.
In either sequential mode or single mode, the RX reset state machine does not reset the PCS until
RXUSERRDY goes High. The user should drive RXUSERRDY High after these conditions are
met:
1.
2.
48
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reset state machine executes the reset sequence as shown in
PMA and RX PCS. During normal operation, sequential mode also allows the user to initiate a
reset by activating any of these resets including RXPMARESET, RXLPMRESET,
EYESCANRESET, RXPCSRESET, and RXBUFRESET, and continue the reset state machine
until RXRESETDONE transitions from Low to High.
RX in Single Mode
When the GTP transceiver's RX is in single mode, RXPMARESET, RXLPMRESET,
EYESCANRESET, RXPCSRESET, and RXBUFRESET in the reset sequence can be executed
individually and independently without triggering a reset on other reset regions.
All clocks used by the application, including RXUSRCLK and RXUSRCLK2, are shown to be
stable or locked when the PLL or the MMCM is used.
The user interface is ready to receive data from the GTP transceiver.
www.xilinx.com
Figure
2-18, covering the entire RX
7 Series FPGAs GTP Transceivers User Guide
UG482 (v1.9) December 19, 2016

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