Xilinx 7 Series User Manual page 172

Fpgas gtp transceivers
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Chapter 4:
Receiver
Ports and Attributes
Table 4-27
Table 4-27: RX 8B/10B Decoder Ports
Port
RX8B10BEN
RXCHARISCOMMA[3:0]
RXCHARISK[3:0]
RXDISPERR[3:0]
RXNOTINTABLE[3:0]
172
Send Feedback
defines the ports required by RX 8B/10B decoder.
Dir
Clock Domain
In
RXUSRCLK2
RX8B10BEN selects the use of the 8B/10B decoder in the RX
datapath, just after the comma detection/realignment block. If this
input is Low, the literal 10-bit data comes out as {RXDISPERR,
RXCHARISK, RXDATA<8 bits>}.
Out
RXUSRCLK2
Active High indicates the corresponding byte shown on RXDATA is a
comma character.
Out
RXUSRCLK2
Active High indicates the corresponding byte shown on RXDATA is a
K character when 8B/10B decoding is enabled.
Out
RXUSRCLK2
Active High indicates the corresponding byte shown on RXDATA has
a disparity error.
Out
RXUSRCLK2
Active High indicates the corresponding byte shown on RXDATA was
not a valid character in the 8B/10B table.
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Description
1: 8B/10B decoder enabled
0: 8B/10B decoder bypassed (reduces latency)
RXCHARISCOMMA[3] corresponds to RXDATA[31:24]
RXCHARISCOMMA[2] corresponds to RXDATA[23:16]
RXCHARISCOMMA[1] corresponds to RXDATA[15:8]
RXCHARISCOMMA[0] corresponds to RXDATA[7:0]
RXCHARISK[3] corresponds to RXDATA[31:24]
RXCHARISK[2] corresponds to RXDATA[23:16]
RXCHARISK[1] corresponds to RXDATA[15:8]
RXCHARISK[0] corresponds to RXDATA[7:0]
This is bit 8 of non-decoded data if the 8B/10B decoder is bypassed
or the corresponding bit of RXNOTINTABLE is High. Refer to
FPGA RX Interface, page
214.
RXDISPERR[3] corresponds to RXDATA[31:24]
RXDISPERR[2] corresponds to RXDATA[23:16]
RXDISPERR[1] corresponds to RXDATA[15:8]
RXDISPERR[0] corresponds to RXDATA[7:0]
This is bit 9 of non-decoded data if the 8B/10B decoder is bypassed
or the corresponding bit of RXNOTINTABLE is High. Refer to
FPGA RX Interface, page
214.
RXNOTINTABLE[3] corresponds to RXDATA[31:24]
RXNOTINTABLE[2] corresponds to RXDATA[23:16]
RXNOTINTABLE[1] corresponds to RXDATA[15:8]
RXNOTINTABLE[0] corresponds to RXDATA[7:0]
7 Series FPGAs GTP Transceivers User Guide
UG482 (v1.9) December 19, 2016

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