Xilinx 7 Series User Manual page 191

X-Ref Target - Figure 4-44
Write Operation
Driven by
XCLK
Normal Condition If RXUSRCLK and XCLK Are Exactly the Same Frequency
Write Operation
Driven by
XCLK
Insert Special Character to
Realign Pointer Difference
to Normal Condition
Write Operation
Driven by
XCLK
Elastic Buffer Can Overflow When Read Clock Slower Than Write Clock
7 Series FPGAs GTP Transceivers User Guide
UG482 (v1.9) December 19, 2016
Pointer Difference is Always Same Between
READ Address and WRITE Address While
They Are Moving
Pointer Difference is Getting Smaller
When READ Clock is Faster
Elastic Buffer Can Underflow When Read Clock Faster Than Write Clock
Pointer Difference is Getting Bigger
When WRITE Clock is Faster
Figure 4-44: Clock Correction Conceptual View
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RX Clock Correction
Read Operation
Driven by
RXUSRCLK
Read Operation
Driven by
RXUSRCLK
Read Operation
Driven by
RXUSRCLK
Remove Special Character to
Realign Pointer Difference
to Normal Condition
UG482_c4_26_071612
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