Rx Analog Front End - Xilinx 7 Series User Manual

Chapter 4: Receiver
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RX Analog Front End

Functional Description
The RX analog front end (AFE) is a high-speed current-mode input differential buffer (see
Figure
•
•
X-Ref Target - Figure 4-2
126
Send Feedback
RX Byte and Word Alignment, page 161
RX 8B/10B Decoder, page 170
RX Buffer Bypass, page 174
RX Elastic Buffer, page 187
RX Clock Correction, page 191
RX Channel Bonding, page 198
RX Gearbox, page 207
FPGA RX Interface, page 214
4-1). It has these features:
Configurable RX termination voltage
Calibrated termination resistors
Board FPGA
MGTAVTT
~100 nF
MGTAVTT
~100 nF
Figure 4-2: RX Analog Front End
www.xilinx.com
ACJTAG RX
50Ω
RX_CM_SEL[1:0]
50Ω
MGTAVTT
ACJTAG RX
7 Series FPGAs GTP Transceivers User Guide
RX_CM_TRIM[3:0]
+ +
Programmable
– –
GND
FLOAT
UG482_c4_02_110911
UG482 (v1.9) December 19, 2016