Frame Synchronization; Frame Sync Signal Source - Analog Devices adsp-2100 Manual

5.7.1

Frame Synchronization

Word framing signals are optional. If the receive frame sync required
(RFSR) or transmit frame sync required (TFSR) bit in the SPORT control
register is a 0, a frame sync signal is necessary to initiate communications
but is ignored after the first bit is transferred. Words are then transferred
continuously, unframed. If the RFSR or TFSR bit is a 1, a frame sync signal
is required at the start of every data word.
The RFSR bit is bit 13 in the SPORT control register (0x3FF6 for SPORT0
and 0x3FF2 for SPORT1), and the TFSR bit is bit 11. These bits are both
cleared at reset, so that communication in both directions on both serial
ports is unframed.
See "Configuration Examples" later in this chapter for examples of frame
sync timing.
5.7.2

Frame Sync Signal Source

The processor can generate frame synchronization signals internally or
receive them from an external source. The sources for transmit frame
syncs and receive frames syncs can be set independently. If the internal
receive frame sync (IRFS) bit or internal transmit frame sync (ITFS) bit in
the SPORT control register is a 0, the processor expects to receive a signal
SPORT0 Control Register: 0x3FF6
SPORT1 Control Register: 0x3FF2
15 14 13 12 11
Figure 5.6 ITFS And IRFS Bits In SPORT Control Register
Serial Ports
10 9 8 7 6
IRFS
IRFS 0= External RFS (Input)
(Internal Receive Frame Sync Required)
1= Internal RFS (Output)
ITFS
ITFS 0= External TFS (Input)
(Internal Transmit Frame Sync Required)
1= Internal TFS (Output)
5 4 3 2 1 0
5
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