Normal And Alternate Framing Modes - Analog Devices adsp-2100 Manual

SCLK is supplied externally. This provides a way to divide external clocks
for any purpose.
You can also use one frame sync to generate a single signal for both
transmit and receive data. For example, an internally generated RFS
(output) could be connected to an externally generated TFS (input) on the
same SPORT for simultaneous transmit and receive operations. This
interconnection is especially useful for combo codec interfaces.
5.7.3

Normal And Alternate Framing Modes

In the normal framing mode, the framing signal is checked at the falling
edge of SCLK. If the framing signal is asserted, received data is latched on
the next falling edge of SCLK and transmitted data is driven on the next
rising edge of SCLK. The framing signal is not checked again until the
word has been transmitted or received. If data transmission or reception is
continuous, i.e., the last bit of one word is followed without a break by the
first bit of the next word, then the framing signal should occur in the same
SCLK cycle as the last bit of each word.
In the alternate framing mode, the framing signal should be asserted in
the same SCLK cycle as the first bit of a word. Received data bits are
latched on the falling edge of SCLK and transmitted bits are driven on the
rising edge of SCLK, but the framing signal is checked only on the first bit.
Internally generated frame sync signals remain asserted for the length of
the serial word. Externally generated frame sync signals are only checked
during the first bit time.
SPORT0 Control Register: 0x3FF6
SPORT1 Control Register: 0x3FF2
15 14 13 12 11
Figure 5.7 TFSW And RFSW Bits In SPORT Control Register
Serial Ports
10 9 8 7 6
TFSW 0=Normal Transmit Framing
TFSW (Transmit Frame Sync Width)
1=Alternate Transmit Framing
RFSW (Receive Frame Sync Width)
RFSW 0=Normal Receive Framing
1=Alternate Receive Framing
5 4 3 2 1
5
0
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