Mac Multiply - Analog Devices adsp-2100 Manual

Adsp-2100 family programmable single-chip microprocessors
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Xop: X operand
Syntax:
[ IF cond]
Permissible xops
MX0
AR
MX1
SR1
MR2
SR0
MR1
MR0
Examples:
IF EQ MR = MX0 * MF (UU);
MF = SR0 * SR0 (SS);
Description:
Test the optional condition and, if true, then multiply the
two source operands and store in the destination location. If the condition
is not true perform a no-operation. Omitting the condition performs the
multiplication unconditionally. The operands are contained in the data
registers specified in the instruction. When MF is the destination operand,
only bits 31-16 of the product are stored in MF.
The xop * xop squaring operation is only available on the ADSP-217x,
ADSP-218x, and ADSP-21msp58/59 processors. Both xops must be the
same register. This option allows single-cycle X
The data format selection field following the two operands specifies
whether each respective operand is in Signed (S) or Unsigned (U) format.
The xop is specified first and yop is second. If the xop * xop operation is
used, the data format selection field must be (UU), (SS), or (RND) only.
There is no default; one of the data formats must be specified.
If RND (Round) is specified, the MAC multiplies the two source operands,
rounds the result to the most significant 24 bits (or rounds bits 31-16 to 16
bits if there is no overflow from the multiply), and stores the result in the
destination register. The two multiplication operands xop and yop (or xop
and xop) are considered to be in twos complement format. All rounding is
unbiased, except on the ADSP-217x, ADSP-218x, and ADSP-21msp58/59
processors, which offer a biased rounding mode. For a discussion of
Yop: Y operand
MR
= xop * yop
MF
Permissible yops
MY0
MY1
MF
(instruction continues on next page)
(SS)
xop
(SU)
(US)
(UU)
(RND)
Permissible conds (see Table 15.9)
EQ
LE
NE
NEG
GT
POS
GE
AV
LT
NOT AV
xop * yop
xop * xop
and ∑X
2
2
instructions.
MAC
15
MULTIPLY
;
AC
NOT AC
MV
NOT MV
NOT CE
15 – 41

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