Operation During Powerdown; Interrupts & Flags; Sports - Analog Devices adsp-2100 Manual

Adsp-2100 family programmable single-chip microprocessors
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Depending on the particular situation and external system conditions, the
powerdown modes shown above could be set conditionally. If you want
to powerdown for a long time you may want to set the mode for lowest
power consumption. If you want to powerdown for a short time, lowest
power consumption may not be that important.
If the RESET pin is used to exit powerdown and the clock has been
stopped, then RESET must be held low for 1000 CLKIN cycles plus the
time required for the phase locked loop to lock and the crystal oscillator to
stabilize (typically 2000 CLKIN cycles.) If the clock is running during
powerdown, a RESET signal of only 5 cycles is required.
9.7.5
Processor Operation During Powerdown
Some processor circuitry may still be active during powerdown mode.
Also, some output pins remain active. A good understanding of these
states will allow you to determine the best low-power configuration for
your system. By keeping output loading and input switching to a
minimum the lowest possible power consumption can be achieved.
9.7.5.1 Interrupts And Flags
Interrupts are latched and can be serviced if the processor exits
powerdown without a context reset (PUCR=1). Any activity on the
interrupt or flag input pins during powerdown will increase the power
consumption. There should also be no resistive load on the flag output
pins (as with any active output pin) if lowest power is desired.

9.7.5.2 SPORTS

The circuitry of the serial ports is not directly affected by powerdown. The
SPORTs are indirectly affected if an internally generated SCLK or frame
sync is required. SPORT circuitry continues to operate during
powerdown.
It is possible to clock data into or out of the serial ports during
powerdown. You must supply an external serial clock to support
operation during powerdown. No interrupts or autobuffer operations will
be serviced during powerdown. Instead, the SPORT interrupts are latched
and can be serviced if the processor exits powerdown without resetting
the processor. Data clocked into the processor will remain in the receive
(RX) registers. Autobuffer transfers will occur after the device exits
powerdown if the processor is not powered up with RESET. Note that any
SPORT activity will increase the power consumption above the 1 mW
specification.
System Interface
9
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