Data Address Generators; Always Initialize L Registers - Analog Devices adsp-2100 Manual

Adsp-2100 family programmable single-chip microprocessors
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12 Programming Model
The ADSP-21xx registers are shown in Figure 12.1. Not all of these registers
are available on every processor. The registers are grouped by function: data
address generators (DAGs), program sequencer, computational units (ALU,
MAC and shifter), bus exchange (PX), memory interface, timer, SPORTs, host
interface and DMA interfaces.
12.1.1

Data Address Generators

DAG1 and DAG2 each have twelve 14-bit registers: four index (I) registers
for storing pointers, four modify (M) registers for updating pointers and four
length (L) registers for implementing circular buffers. DAG1 addresses data
memory only and has the capability of bit-reversing its outputs. DAG2
addresses both program and data memory and can provide addresses for
indirect branching (jumps and calls) as well as for accessing data.
For example:
AX0=DM(I0,M0);
is an indirect data memory read from the location pointed to by I0. Once the
read is complete, I0 is updated by M0.
PM(I4,M5)=MR1;
is an indirect program memory data write to the address pointed to by I4
with a post modify by M5. The instruction
JUMP (I4);
is an example of an indirect jump.

12.1.1.1 Always Initialize L Registers

The ADSP-21xx processors allow two addressing modes for data memory
accesses: direct and register indirect. Indirect addressing is accomplished by
loading an address into an I (index) register and specifying one of the
available M (modify) registers.
The L registers are provided to facilitate wraparound addressing of circular
data buffers. A circular buffer is only implemented when an L register is set
to a non-zero value. For linear (i.e. non-circular) indirect addressing, the L register
corresponding to the I register used must be set to zero. Do not assume that the L
registers are automatically initialized or may be ignored; the I, M, and L
registers contain random values following processor reset. Your program
must initialize the L registers corresponding to any I registers it uses.
12 – 2

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