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Memory-Mapped Registers
Host HDR5 Read
Host HDR4 Read
Host HDR3 Read
Host HDR2 Read
Host HDR1 Read
Host HDR0 Read
OVERWRITE
SOFTWARE
Default bit values at reset are shown; if no value is shown, the bit is undefined at reset.
Reserved bits are shown on a gray field—these bits should always be written with zeros.
Control/Status Registers
HMASK Interrupt Mask Register
15
14
13
12
11
0
0
0
0
0
HSR7 Status Register
15
14
13
12
11
0
0
0
0
0
MODE
RESET
10
9
8
7
6
5
0
0
0
0
0
0
10
9
8
7
6
0
0
0
1
0
(ADSP-2171, ADSP-2111,
ADSP-21msp5x only)
4
3
2
1
0
0
0
0
0
0
(ADSP-2171, ADSP-2111,
ADSP-21msp5x only)
5
4
3
2
1
0
0
0
0
0
0
0
E
DM(0x3FE8)
Host HDR0 Write
Host HDR1 Write
Host HDR2 Write
Host HDR3 Write
Host HDR4 Write
Host HDR5 Write
DM(0x3FE7)
21xx HDR0 Write
21xx HDR1 Write
21xx HDR2 Write
21xx HDR3 Write
21xx HDR4 Write
21xx HDR5 Write
E – 9
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