Table of Contents
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Contents
2.2.7
2.2.8
2.3
2.3.1
2.3.2
2.3.2.1
2.3.2.2
2.3.2.3
2.3.2.4
2.3.2.5
2.3.2.6
2.3.2.7
2.4
2.4.1
2.4.2
2.4.2.1
2.4.2.2
2.4.2.3
2.4.2.4
2.4.2.5
3.1
3.2
3.2.1
3.2.2
3.2.3
3.2.4
3.3
3.3.1
3.3.1.1
3.3.2
3.3.3
3.3.4
3.3.4.1
3.4
3.4.1
3.4.2
3.4.2.1
3.4.2.2
3.4.2.3
3.4.2.4
3.4.3
3.4.3.1
iv
Division ........................................................................................ 2-9
ALU Status .................................................................................. 2-13
MULTIPLIER/ACCUMULATOR (MAC) ................................... 2-13
MAC Block Diagram Discussion ............................................. 2-13
MAC Operations ........................................................................ 2-16
Standard Functions.............................................................. 2-16
Input Formats ....................................................................... 2-18
MAC Input/Output Registers ........................................... 2-18
MR Register Operation ....................................................... 2-18
MAC Overflow And Saturation ........................................ 2-19
Rounding Mode ................................................................... 2-20
Biased Rounding (ADSP-217x/218x/21msp5x) ............. 2-21
BARREL SHIFTER ........................................................................... 2-22
Shifter Block Diagram Discussion ........................................... 2-22
Shifter Operations ...................................................................... 2-28
Shifter Input/Output Registers ......................................... 2-28
Derive Block Exponent ....................................................... 2-29
Immediate Shifts .................................................................. 2-30
Denormalize ......................................................................... 2-31
Normalize ............................................................................. 2-33
OVERVIEW ........................................................................................ 3-1
PROGRAM SEQUENCER ................................................................ 3-1
Next Address Select Logic .......................................................... 3-3
Program Counter & PC Stack .................................................... 3-4
Loop Counter & Stack ................................................................. 3-4
Loop Comparator & Stack .......................................................... 3-5
PROGRAM CONTROL INSTRUCTIONS ..................................... 3-8
JUMP Instruction ......................................................................... 3-8
Register Indirect JUMPs........................................................ 3-8
CALL Instruction ......................................................................... 3-9
DO UNTIL Loops ........................................................................ 3-9
IDLE Instruction ........................................................................ 3-10
Slow IDLE ............................................................................. 3-10
INTERRUPTS ................................................................................... 3-11
Interrupt Servicing Sequence ................................................... 3-14
Configuring Interrupts.............................................................. 3-14
Interrupt Control Register (ICNTL) .................................. 3-15
Interrupt Mask Register (IMASK) ..................................... 3-16
Global Enable/Disable For Interrupts .............................. 3-17
Interrupt Force & Clear Register (IFC) ............................. 3-18
Interrupt Latency ....................................................................... 3-18
Timer Interrupt Latency (ADSP-2101/2105/2111/2115)3-19
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