Analog Devices adsp-2100 Manual page 369

MAC
15
MULTIPLY / SUBTRACT
rounding is unbiased, except on the ADSP-217x, ADSP-218x, and ADSP-
21msp58/59 processors, which offer a biased rounding mode. For a
discussion of biased vs. unbiased rounding, see "Rounding Mode" in the
"Multiplier/Accumulator" section of Chapter 2, Computation Units.
Status Generated:
ASTAT:
MV
Instruction Format:
(xop * yop) Conditional ALU/MAC Operation, Instruction Type 9:
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0
AMF: Specifies the ALU or MAC Operation. In this case,
AMF
0 1 1 0 0
0 1 1 0 1
0 1 1 1 0
0 1 1 1 1
0 0 0 1 1
Z: Destination register
Xop: X operand register
(xop * xop) Conditional ALU/MAC Operation, Instruction Type 9:
(ADSP-217x, ADSP-218x, ADSP-21msp58/59 only)
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0
AMF: Specifies the ALU or MAC Operation. In this case,
AMF
0 1 1 0 0
0 1 1 1 1
0 0 0 1 1
15 – 46
7 6 5
SS MV AQ AS
– * –
Set on MAC overflow (if any of the upper 9 bits of MR are
not all one or zero). Cleared otherwise.
1 0 0 Z AMF
FUNCTION
MR–xop * yop
MR–xop * yop
MR–xop * yop
MR–xop * yop
MR–xop * yop
1 0 0 Z AMF
FUNCTION
MR–xop * xop
MR–xop * xop
MR–xop * xop
4 3 2
AC AV AN AZ
– – –
Yop Xop
Data Format X-Operand
(SS) Signed
(SU) Signed
(US) Unsigned
(UU) Unsigned
(RND) Signed
Yop: Y operand register
COND: condition
0 0 Xop
Data Format X-Operand
(SS) Signed
(UU) Unsigned
(RND) Signed
1 0
– –
0 0 0 0 COND
Y-Operand
Signed
Unsigned
Signed
Unsigned
Signed
0 0 0 1 COND