Analog Devices adsp-2100 Manual page 389

Adsp-2100 family programmable single-chip microprocessors
Table of Contents

Advertisement

MOVE
15
LOAD REGISTER IMMEDIATE
Instruction Format :
Load Data Register Immediate, Instruction Type 6:
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0
1
DATA contains the immediate value to be loaded into the Data Register
destination location. The data is right-justified in the field, so the value
loaded into an N-bit destination register is contained in the lower-order N
bits of the DATA field.
DREG selects the destination Data Register for the immediate data value.
One of the 16 Data Registers is selected according to the DREG Selection
Table (see Appendix A).
Load Non-Data Register Immediate Instruction Type 7:
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0
0
DATA contains the immediate value to be loaded into the Non-Data
Register destination location. The data is right-justified in the field, so the
value loaded into an N-bit destination register is contained in the lower-
order N bits of the DATA field.
RGP (Register Group) and REG (Register) select the destination register
according to the Register Selection Table (see Appendix A).
15 – 66
0
0
DATA
1
1
RGP
DATA
DREG
REG

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents