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15 Instruction Set Reference
15.10.3 Status Register Notation
The following notation is used in the discussion of the effect each
instruction has on the processors' status registers:
*
–
0 or 1
For example, the status word ASTAT is shown below:
ASTAT:
Here the MV bit is updated and the AV bit is cleared.
15 –20
An asterisk indicates a bit in the status word that is changed by
the execution of the instruction.
A dash indicates that a bit is not affected by the instruction.
Indicates that a bit is unconditionally cleared or set.
7
6
5
SS MV AQ AS
–
*
–
4
3
2
1
AC AV AN AZ
–
–
0
–
0
–
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