Analog Devices adsp-2100 Manual page 449

B Division Exceptions
The subroutine unsigned_div is very similar to signed_div. MR1 and AF are
loaded with the MSW of the dividend, MR0 is loaded with the dividend
LSW and the divisor is passed into AR. Since unsigned division with a
large divisor (> 0x7FFF) is prohibited, the MSB of the divisor is checked. If
it contains a one, the overflow flag is set, and the routine returns to the
caller. Otherwise test_11 checks for a standard divide overflow.
In test_11 the divisor is subtracted from the MSW of the dividend. If the
result is less then zero division can proceed, otherwise the overflow flag is
set. If you wish to remove test_11, be sure to change the JUMP address in
test_10 to do_divq.
The actual unsigned division is performed by first clearing the AQ bit of
the ASTAT register, then executing sixteen DIVQ instructions. The
remainder is computed, after first setting MR2 to zero. This is necessary
since MR1 automatically sign-extends into MR2. Also, the multiply must
be executed with the unsigned switch. To ensure that the overflow flag is
clear, ASTAT is set to zero before returning.
In both subroutines, the computation of the remainder requires only one
extra cycle, so it is unlikely you would need to remove it for speed. If it is
a problem to have the multiply registers altered, remove the
multiply/subtract instruction just before the return, and remove the
register transfers to MR0 and MR1 in the first two multifunction
instructions. Be sure to remove the MR2=0; instruction in the unsigned_div
subroutine also.
.MODULE/ROM Divide_solution;
{
This module can be used to generate correct results when using the divide primitives
of the ADSP-2100 family. The code is organized in sections. This entire module can
be used to handle all error conditions, or individual sections can be removed to
increase execution speed.
Entry Points
signed_div Computes 16-bit signed quotient
unsigned_div Computes 16-bit unsigned quotient
Calling Parameters
AX0 = 16-bit divisor
AY0 = Lower 16 bits of dividend
AY1 = Upper 16 bits of dividend
B – 6