Ending Powerdown With The Reset Pin; Startup Time After Powerdown; Systems Using An External Ttl/Cmos Clock - Analog Devices adsp-2100 Manual

9.7.3.2 Ending Powerdown With The RESET Pin

If RESET is asserted while the processor is in the powerdown mode, the
processor is reset and instructions are executed from address 0x0000. A
boot is performed if the MMAP pin is set to 0. If the RESET pin is used to
exit powerdown, then it must be held low for the appropriate number of
cycles. If the clock is stopped at powerup or operating at a different
frequency at powerup than it was before powerdown, RESET must be
held long enough for the oscillator to stabilize plus an additional 1000
CLKIN cycles for the phase locked loop to lock. The time required for the
oscillator to stabilize depends upon the type of crystal used and
capacitance of the external crystal circuit. Typically 2000 CLKIN cycles is
adequate for clock stabilization time.
If the clock was not stopped at powerup and is at a stable frequency at
powerup (same as before powerdown), only 5 cycles of RESET are
required.
When ending powerdown with RESET, the XTALDELAY (delay start-up
from powerdown) control bit is ignored.
9.7.4

Startup Time After Powerdown

The time required to exit the powerdown state depends on whether an
internal or external oscillator is used, and the method used to exit
powerdown.

9.7.4.1 Systems Using An External TTL/CMOS Clock

When the processor is in powerdown, the external clock signal is ignored
if the XTALDIS bit (XTAL pin disable) of the Powerdown Control Register
is set to 1. It is therefore not necessary to stop the external clock since no
power is wasted while the external clock is running. If the external clock is
to be stopped anyway, it must be kept running for (at least) one additional
cycle after the IDLE instruction is executed.
The XTALDIS bit should always be set before entering powerdown. This
specifies that the XTAL pin is not to be driven by the processor. During
powerdown there is no need to drive the XTAL pin when an external
oscillator is used. Disabling the XTAL pin drive during powerdown lets
the input clock run without wasting power.
After the processor is taken out of the powerdown mode by either the PWD
pin or RESET, it will begin executing instructions after a maximum start-
up time of 100 CLKIN cycles as long as the clock oscillator is stable and at
the same frequency as before powerdown.
System Interface 9
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