Analog Devices adsp-2100 Manual page 293

13 Hardware Examples
When a low-level signal at the D input is clocked into the flip-flop, the
output is brought high, deasserting
The bus request pin (
synchronize the booting process. The host releases bus request, causing
the ADSP-21xx to read one byte of boot data. During the read operation
BMS
the
and the ADSP-21xx to be put back into a bus request state. The ADSP-21xx
remains suspended, waiting for the next byte of boot data.
Three programmable port bits of the microcontroller (PB 8-10) are used to
provide the handshake mechanism for the transfer of each byte of boot
data. Alternately, PB9 and PB10 could be implemented as a memory-
mapped port location. PB8 is used to bring the ADSP-21xx out of reset,
starting the boot process. Note that if PB8 is not low at power-up, the
ADSP-21xx will start executing undefined instructions until PB8 is
brought low.
The boot data is presented by the microcontroller either through 8 port
bits (PB0-7) or through a memory-mapped port. The PB0-7 bits should be
put into a high-impedance state after the boot is complete, to prevent bus
contention if the ADSP-21xx tries to write to external memories or
peripherals.
A typical boot sequence for this system is as follows:
1.) Bring PB8 low to reset the ADSP-21xx.
2.) Clock a high state into the flip-flop with PB9 and PB10 to bring
3.) Bring PB8 high to bring the ADSP-21xx out of reset.
4.) Place a byte of boot data on the data bus (PB0-7.).
5.) Clock a low state into the flip-flop with PB9 and PB10 to bring
6.) Wait a minimum of six processor cycles while the ADSP-21xx fetches
the data byte and the flip-flop asserts
7.) Repeat steps 4, 5, and 6 for each byte of boot data. After the last
iteration, the ADSP-21xx will automatically start execution.
13 – 4
BR
) of the ADSP-21xx is used to stop and
pin is asserted, which in turn causes the
BR
.
BR
pin to be asserted
BR
.
Q
BR
low.
BR
high.