Analog Devices adsp-2100 Manual page 7

10.4 BOOT MEMORY INTERFACE .................................................... 10-15
10.4.1 Boot Pages ................................................................................. 10-15
10.4.2 Powerup Boot & Software Reboot ........................................ 10-16
10.4.3 Boot Memory Access ............................................................... 10-17
10.4.4 Boot Loading Sequence ........................................................... 10-17
10.5 BUS REQUEST/GRANT .............................................................. 10-21
10.6 ADSP-2181 MEMORY INTERFACES ......................................... 10-23
10.6.1 ADSP-2181 Program Memory Interface ............................... 10-25
10.6.2 ADSP-2181 Data Memory Interface ...................................... 10-30
10.6.3 ADSP-2181 Byte Memory Interface....................................... 10-32
10.6.4 ADSP-2181 I/O Memory Space ............................................. 10-32
10.6.5 ADSP-2181 Composite Memory Select................................. 10-35
10.6.6 External Memory Read - Overlays & I/O Memory ........... 10-36
10.6.7 External Memory Write - Overlays & I/O Memory .......... 10-37
10.7 MEMORY INTERFACE SUMMARY (ALL PROCESSORS) ... 10-37
CHAPTER 11
11.1 OVERVIEW ...................................................................................... 11-1
11.2 BDMA PORT .................................................................................... 11-2
11.2.1 BDMA Port Functional Description ........................................ 11-4
11.2.2 BDMA Control Registers .......................................................... 11-4
11.2.3 Byte Memory Word Formats ................................................... 11-9
11.2.4 BDMA Booting ........................................................................... 11-9
11.2.4.1 Development Software Features for BDMA Booting . 11-11
11.3 IDMA PORT ................................................................................... 11-12
11.3.1 IDMA Port Pin Summary ....................................................... 11-12
11.3.2 IDMA Port Functional Description ....................................... 11-14
11.3.3 Modifying Control Registers for IDMA ............................... 11-16
11.3.4 IDMA Timing ........................................................................... 11-17
11.3.4.1 Address Latch Cycle.......................................................... 11-17
11.3.4.2 Long Read Cycle ................................................................ 11-18
11.3.4.3 Short Read Cycle ................................................................ 11-20
11.3.4.4 Long Write Cycle ............................................................... 11-21
11.3.4.5 Short Write Cycle ............................................................... 11-23
11.3.5 Boot Loading Through The IDMA Port ............................... 11-24
11.3.6 DMA Cycle Stealing, DMA Hold Offs, and
DMA PORTS
Contents
IACK
............. 11-25
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