SCLK
DT
MSB
TFS
Figure 13.4 SPORT To AD766 DAC Timing
The configuration of the SPORT control registers for this application is
shown in Figure 13.5.
15
14
13
12
1
SCLK generated internally
Transmit framing required
Alternate transmit framing
Internally generated TFS
Figure 13.5 SPORT To AD766 DAC Control Register Settings
Hardware Examples
SPORT0 Control Register: 0x3FF6
SPORT1 Control Register: 0x3FF2
11
10
9
8
7
1
1
1
0
LSB
MSB
Latches data into DAC
6
5
4
3
2
0
0
1
1
Word Length = 16 bits
Data format = right justify, zero fill
Non-inverted TFS
13
1
0
1
1
13 – 9