Word Framing Options - Analog Devices adsp-2100 Manual

Adsp-2100 family programmable single-chip microprocessors
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5 Serial Ports
15
14
Figure 5.4 SLEN Field In SPORT Control Register
For example, if you are using 8-bit serial words, set SLEN to 7 (0111
binary). The SLEN field is bits 3-0 in the SPORT control register (0x3FF6
for SPORT0 and 0x3FF2 for SPORT1). See Figure 5.4 on the next page.
Do not set SLEN to zero or one; these SLEN values are not permitted.
5.7
OPTIONS
Framing signals identify the beginning of each serial word transfer. The
SPORTs have many ways of handling framing signals. Transmit and
receive framing are independent of each other. All frame sync signals are
sampled on the falling edge of the serial clock (SCLK).
15
14
Figure 5.5 TFSR And RFSR Bits In SPORT Control Register
5 – 10
SPORT0 Control Register: 0x3FF6
SPORT1 Control Register: 0x3FF2
13
12
11
10
9
SPORT0 Control Register: 0x3FF6
SPORT1 Control Register: 0x3FF2
13
12
11
10
9
TFSR
TFSR (Transmit Frame Sync Required)
RFSR
RFSR (Receive Frame Sync Required)
8
7
6
5
4
SLEN (Serial Word Length – 1)
8
7
6
5
4
3
0= Transmit Frame Sync Required 1st Word
1= Transmit Frame Sync Required Every Word
0= Receive Frame Sync Required 1st Word
1= Receive Frame Sync Required Every Word
3
2
1
0
WORD FRAMING
2
1
0

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