Analog Devices adsp-2100 Manual page 468

E Control/Status Registers
Memory-Mapped Registers
15 14
0 0
ADC Offset
IG0
ADC Input Gain (ADC PGA)
DABY
DAC High Pass Filter Bypass
1=bypass, 0=insert
ADBY
ADC High Pass Filter Bypass
1=bypass, 0=insert
15 14
15 14
E – 8
Analog Control Register
13 12 11 10 9
0 0 0 0 0
IG1, IG0
ADC Input Gain (ADC PGA)
Gain IG1 IG0
0 dB 0 0
+6 dB 0 1
+20 dB 1 0
+26 dB 1 1
Analog Data Registers
ADC Receive Data
13 12 11 10 9
DAC Transmit Data
13 12 11 10 9
8 7 6 5 4
0 0 0 0 0
OG2
OG2, OG1, OG0
DAC Output Gain (DAC PGA)
Gain OG2
+6 dB 0
+3 dB 0
0 dB 0
–3 dB 0
–6 dB 1
–9 dB 1
–12 dB 1
–15 dB 1
8 7 6 5 4
8 7 6 5 4
(ADSP-21msp5x only)
3 2 1 0
0 0 0 0
DM(0x3FEE)
OG1 OG0
OG1 OG0
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
(ADSP-21msp5x only)
3 2 1 0
DM(0x3FED)
3 2 1 0
DM(0x3FEC)
IG1
ADC Input Gain (ADC PGA)
IMS
ADC Input Multiplexer Select
1=AUX input, 0=NORM input
OG2, OG1, OG0
DAC Output Gain (DAC PGA)
APWD
Analog Interface Powerdown
0=powerdown, 1=enable
(Set both bits to 1 to
enable analog interface)