Analog Devices adsp-2100 Manual page 164

Adsp-2100 family programmable single-chip microprocessors
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7 Host Interface Port
The following example shows the data that a host would write to the HIP
for a 1000-instruction boot:
Data
Page Length (124 decimal)
Upper Byte of Instruction at 999
Lower Byte of Instruction at 999
Middle Byte of Instruction at 999
Upper Byte of Instruction at 998
Lower Byte of Instruction at 998
Middle Byte of Instruction at 998
Upper Byte of Instruction at 997
Lower Byte of Instruction at 997
Middle Byte of Instruction at 997
Upper Byte of Instruction at 0
Lower Byte of Instruction at 0
Middle Byte of Instruction at 0
A 16-bit host boots the ADSP-21xx at the same rate as an 8-bit host. Either
type of host must write the same data to the same the HDRs in the same
sequence (HDR0, HDR2, HDR1). If a 16-bit host writes 16-bit data, the
upper byte of the data must be 0x00. The following example, loading the
instruction 0xABCDEF, illustrates this:
1st Write (to HDR0)
2nd Write (to HDR2)
3rd Write (to HDR1)
7 – 18
8-Bit Host
0xAB
0xEF
0xCD
Location
HDR3
HDR0
HDR2
HDR1
HDR0
HDR2
HDR1
HDR0
HDR2
HDR1
HDR0
HDR2
HDR1
16-Bit Host
0x00AB
0x00EF
0x00CD

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