Analog Devices adsp-2100 Manual page 50

2 Computational Units
The exponent detector derives an exponent for the shifter input value. The
exponent detector operates in one of three ways which determine how the
input value is interpreted. In the HI state, the input is interpreted as a
single precision number or the upper half of a double precision number.
The exponent detector determines the number of leading sign bits and
produces a code which indicates how many places the input must be up-
shifted to eliminate all but one of the sign bits. The code is negative so that
it can become the effective exponent for the mantissa formed by removing
the redundant sign bits.
In the HI-extend state (HIX), the input is interpreted as the result of an
add or subtract performed in the ALU which may have overflowed.
Therefore the exponent detector takes the arithmetic overflow (AV) status
into consideration. If AV is set, then a +1 exponent is output to indicate an
extra bit is needed in the normalized mantissa (the ALU Carry bit); if AV
is not set, then HI-extend functions exactly like the HI state. When
performing a derive exponent function in HI or HI-extend modes, the
exponent detector also outputs a shifter sign (SS) bit which is loaded into
the arithmetic status register (ASTAT). The sign bit is the same as the MSB
of the shifter input except when AV is set; when AV is set in HI-extend
state, the MSB is inverted to restore the sign bit of the overflowed value.
In the LO state, the input is interpreted as the lower half of a double
precision number. In the LO state, the exponent detector interprets the SS
bit in the arithmetic status register (ASTAT) as the sign bit of the number.
The SE register is loaded with the output of the exponent detector only if
SE contains –15. This occurs only when the upper half–which must be
processed first–contained all sign bits. The exponent detector output is
also offset by –16 to account for the fact that the input is actually the lower
half of a 32-bit value. Table 2.5 gives the exponent detector characteristics
for all three modes.
The exponent compare logic is used to find the largest exponent value in
an array of shifter input values. The exponent compare logic in
conjunction with the exponent detector derives a block exponent. The
comparator compares the exponent value derived by the exponent
detector with the value stored in the shifter block exponent (SB) register
and updates the SB register only when the derived exponent value is
larger than the value in SB register. See the examples shown in the
following sections.
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