Analog Devices adsp-2100 Manual page 39

Computational Units 2
The input/output registers of the MAC are similar to the ALU.
The X input port can accept data from either the MX register file or from
any register on the result (R) bus. The R bus connects the output registers
of all the computational units, permitting them to be used as input
operands directly. There are two registers in the MX register file, MX0 and
MX1. These registers can be read and written from the DMD bus. The MX
register file outputs are dual-ported so that one register can provide input
to the multiplier while either one simultaneously drives the DMD bus.
The Y input port can accept data from either the MY register file or the MF
register. The MY register file has two registers, MY0 and MY1; these
registers can be read and written from the DMD bus and written from the
PMD bus. The instruction set also provides for reading these registers over
the PMD bus, but there is no direct connection; this operation uses the
DMD-PMD bus exchange unit. The MY register file outputs are also dual-
ported so that one register can provide input to the multiplier while either
one simultaneously drives the DMD bus.
The output of the adder/subtracter goes to either the MF register or the
MR register. The MF register is a feedback register which allows bits 16–31
of the result to be used directly as the multiplier Y input on a subsequent
cycle. The 40-bit adder/subtracter register (MR) is divided into three
sections: MR2, MR1, and MR0. Each of these registers can be loaded
directly from the DMD bus and output to either the DMD bus or the R
bus.
Any of the registers associated with the MAC can be both read and
written in the same cycle. Registers are read at the beginning of the cycle
and written at the end of the cycle. A register read, therefore, reads the
value loaded at the end of a previous cycle. A new value written to a
register cannot be read out until a subsequent cycle. This allows an input
register to provide an operand to the MAC at the beginning of the cycle
and be updated with the next operand from memory at the end of the
same cycle. It also allows a result register to be stored in memory and
updated with a new result in the same cycle. See the discussion of
"Multifunction Instructions" in Chapter 15 "Instruction Set Reference" for
an illustration of this same-cycle read and write.
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