Single-Precision Fir Transversal Filter - Analog Devices adsp-2100 Manual

14 Software Examples
relocatable (placed at an absolute address).
The linker places non-relocatable code or data modules at the specified
memory addresses, provided the memory area has the correct attributes.
Relocatable objects are placed at addresses selected by the linker. The
linker generates a memory image file containing a single executable
program which may be loaded into a simulator or emulator for testing.
The simulator provides windows that display different portions of the
hardware environment. To replicate the target hardware, the simulator
configures its memory according to the architecture description file
generated by the system builder, and simulates memory-mapped I/O
ports. This simulation allows you to debug the system and analyze
performance before committing to a hardware prototype.
After fully simulating your system and software, you can use an EZ-ICE
in-circuit emulator in the prototype hardware to test circuitry, timing, and
real-time software execution.
The PROM splitter software tool translates the linker-output program
(memory image file) into an industry-standard file format for a PROM
programmer. Once you program the code in PROM devices and install an
ADSP-21xx processor into your prototype, it is ready to run.
14.3
An FIR transversal filter structure can be obtained directly from the
equation for discrete-time convolution.
y(n) =
In this equation, x(n) and y(n) represent the input to and output from the
filter at time n. The output y(n) is formed as a weighted linear
combination of the current and past input values of x, x(n–k). The weights,
h (n), are the transversal filter coefficients at time n. In the equation,
k
x(n–k) represents the past value of the input signal "contained" in the
(k+1)th tap of the transversal filter. For example, x(n), the present value of
the input signal, would correspond to the first tap, while x(n–42) would
14 – 4

SINGLE-PRECISION FIR TRANSVERSAL FILTER

N–1
∑
h (n) x(n–k)
k
k=0