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7 Host Interface Port
HSR7
HSR6
21xx HDR5 Write
21xx HDR4 Write
21xx HDR3 Write
21xx HDR2 Write
21xx HDR1 Write
21xx HDR0 Write
Figure 7.2 HIP Status Registers
The lower six bits of HSR7 are copied from the upper byte of HSR6 so that
8-bit hosts can read both sets of status. Bits 7 and 6 of HSR7 control the
overwrite mode and software reset, respectively; these functions are
described later in this chapter. The upper byte of HSR7 is reserved. All
reserved bits and the software reset bit read as zeros. The overwrite bit is
the only bit in the HSRs that can be both written and read. At reset, all
HSR bits are zeros except for the overwrite bit, which is a one.
7.4
The ADSP-21xx core can place a data value into one of the HDRs for
retrieval by the host computer. Similarly, the host computer can place a
data value into one of the HDRs for retrieval by the ADSP-21xx. To the
host computer, the HDRs function as a section of memory. To the
ADSP-21xx, the HDRs are memory-mapped registers, part of the internal
data memory space.
7 – 6
15
14
13
12
11
10
9
0
0
0
0
0
0
0
OVERWRITE
MODE
SOFTWARE
RESET
15
14
13
12
11
10
9
0
0
0
0
0
0
0
8
7
6
5
4
3
2
1
0
1
0
0
0
0
0
0
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
HIP OPERATION
0
0
0x3FE7
21xx HDR0 Write
21xx HDR1 Write
21xx HDR2 Write
21xx HDR3 Write
21xx HDR4 Write
21xx HDR5 Write
0
0x3FE6
0
Host HDR0 Write
Host HDR1 Write
Host HDR2 Write
Host HDR3 Write
Host HDR4 Write
Host HDR5 Write
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