Analog Devices adsp-2100 Manual page 119

Adsp-2100 family programmable single-chip microprocessors
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5 Serial Ports
continuous receiving in the alternate framing mode. In these four figures,
both the input timing requirement for an externally generated frame sync
and the output timing characteristic of an internally generated frame sync
are shown. Note that the output meets the input timing requirement; thus,
on processors with two SPORTs, one SPORT could provide RFS for the
other.
SCLK
TFS
OUTPUT
TFS
INPUT
DT
SPORT Control Register:
Internal Frame Sync
External Frame Sync
Both Internal Framing Option and External Framing Option Shown
Figure 5.16 SPORT Transmit, Normal Framing
SCLK
TFS
OUTPUT
TFS
INPUT
DT
SPORT Control Register:
Internal Frame Sync
External Frame Sync
Both Internal Framing Option and External Framing Option Shown
Figure 5.17 SPORT Continuous Transmit, Normal Framing
5 – 20
B3
B2
B1
0XXX 101X 0XXX 0011
0XXX 100X 0XXX 0011
B3
B2
B1
0XXX 101X 0XXX 0011
0XXX 100X 0XXX 0011
B0
B0
B3
B2
B3
B2
B1
B1
B0
B3
B0
B2

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