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6 Timer
15
14
0
0
Figure 6.1 Timer Registers
TSCALE stores a scaling value that is one less than the number of cycles
between decrements of TCOUNT. For example, if the value in TSCALE
register is 0, the counter register decrements once every cycle. If the value
in TSCALE is 1, the counter decrements once every 2 cycles. Figure 6.2
shows the timer block diagram.
CLKOUT
Figure 6.2 Timer Block Diagram
6 – 2
13
12
11
10
9
TPERIOD Period Register
TCOUNT Counter Register
0
0
0
0
0
DMD Bus
8
TSCALE
Timer Enable
& Prescale Logic
Timer Enable
8
7
6
5
4
TSCALE Scaling Register
0
16
16
16
Count Register Load Logic
Decrement
TCOUNT
3
2
1
0
0x3FFD
0x3FFC
0x3FFB
TPERIOD
Zero
Timer
Interrupt
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