80C51 Interface To Host Interface Port - Analog Devices adsp-2100 Manual

The autobuffering capability of the serial ports can be used in this
configuration to transfer an entire buffer of data from the data memory
space of one processor to the other's, without interrupt overhead. The serial
ports handshake automatically—when one processor writes its' TX0
register, the data is automatically transmitted to the other processor's RX0
register and an autobuffer cycle is generated.
In fact, autobuffer transfers can occur in both directions at the same time,
in the background, while each processor is executing some other primary
function. Each SPORT will generate an interrupt when the autobuffer
transfer is complete. The description of autobuffering in the Serial Port
chapter shows an example of the code for setting up autobuffering.
13.7

80C51 INTERFACE TO HOST INTERFACE PORT

The host interface port (HIP) on the ADSP-2111, ADSP-2171, and ADSP-
21msp5x processors facilitates communication with a host microcomputer
such as the Intel 80C51. An example connection is shown in Figure 13.10.
In this example, the HIP data registers (HDRs) and HIP status registers
(HSRs) of the ADSP-2111 occupy eight contiguous locations in the
memory space of the 80C51.
ADSP-21xx
ADSP-2111
HMD0 HMD1 HSIZE
+5 V +5 V
Figure 13.10 Host Port Interface to 80C51 Microcomputer
Hardware Examples
ADDRESS
HSEL
DECODE
ALE
HRD
HWR
HAD0-7
8
P2.0-2.7
ALE
RD
WR
8
P0.0-0.7
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