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MOVE
15
DATA MEMORY WRITE (Indirect Address)
Instruction Format:
ALU / MAC Operation with Data Memory Write, Instruction Type 4:
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0
1
Data Memory Write, Immediate Data, Instruction Type 2:
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1
0
AMF specifies the ALU or MAC operation to be performed in parallel
with the Data Memory Write. In this case, AMF = 00000, indicating a no-
operation for the ALU / MAC function.
Data represents the actual 16-bit value.
DREG selects the source Data Register. One of the 16 Data Registers is
selected according to the Register Selection Table (see Appendix A).
G specifies which Data Address Generator the I and M registers are
selected from. These registers must be from the same DAG as separated
by the gray bar in the Syntax description above. I specifies the indirect
address pointer (I register). M specifies the modify register (M register).
15 – 72
1
G
1
0
AMF
1
G
0
0
0 0 0
DREG
Data
I
M
I
M
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